Font Size: a A A

The Ultra-deep Sub-micron Integrated Circuits, Ir-drop Argument Analysis

Posted on:2005-04-19Degree:MasterType:Thesis
Country:ChinaCandidate:Y D YangFull Text:PDF
GTID:2208360122475081Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
With the advance of semiconductor manufacturing, circuits with increasingly higher speed are being integrated at an increasingly higher density, which makes analysis and verification of power grid integrity more important. Power grid integrity includes four issues, namely, IR drop analysis, ground bounce analysis, Ldi/dt from the pin inductance and EM analysis. This paper focuses on IR drop analysis, and the principle of ground bounce analysis is almost the same as it.Power grid integrity analysis can be implemented in four steps: first, to extract the R parameters of the power grid; second, to partition the power grid when needed and in the same time extract the current; third, to reduce the power grid efficiently; and the last, to construct the nodal analysis equations of the global and local power grids and solve them.There are two types of IR drop analysis: static IR drop analysis and dynamic IR drop analysis. Static IR drop analysis is based on the average current of the devices. Dynamic IR drop analysis is based on input vectors, which is more accurate but time consuming. For a large scale integrated circuit, full chip with full input vectors analysis is impossible, however the run time of static analysis is less and if combining the area-based and activity-based static analysis, the results are aknost accord with the reality.For a million gates design, nodes of power grid are typically more than one million. Traditional linear system solver can't deal with such a large network either in speed or in memory, which make solving the network a challenging work. Based on the existing tools, an enhanced hierarchical solving algorithm is proposed: the partition technique which correct wrong partition nodes automatically and a 2-step reduction which can simplify the circuit and decrease its dimension greatly. The activity-based current extraction algorithm has been improved in gate capacitance calculation.We have developed a tool suite using C/C++ language on Sun Ultra60workstation-IR drop 2003. It can be used to accomplish the analysis of power grid integrity with high speed. This tool suite consists of five components: tools for power grid parameter extraction, tools for enhanced circuit's partition, two steps reduction, the fast circuit solver and a plotter.
Keywords/Search Tags:Ultra-deep
PDF Full Text Request
Related items