Atsc-8vsb Receiver Design And Implementation Of The Digital Demodulator Chip

Digital High Definition Television (Digital HDTV) is one of the focuses of the world's competition in high technology. It will be the standard of the third generation televidsion broadcasting and it will affect the world's politics, economy and culture greatly. This paper is about the algorithm of digital demodulater and it's implementation in ASIC (Application Specific Integrated Circuits) of VSB channel receiver of HDTV Terrestrial Transmission Subsystem. VSB is the standard of ATSC-HDTV Terrestrial Transmission Subsystem. The first chapter introduced the development of HDTV, a comparison of VSB and OFDM, and the ATSC scheme of HDTV in system level. The second chapter introduced the EDA design flow chart. The third chapter introduced the theory of digital modulater and demodulater , then PLL. A pratical algorithm is also given. In this algorithm, an assistant circuit is used to help the PLL recover carrier, at last. introduced optimum filter design. in the fourth chapter, the ASIC project of digital demodulater will be illuminated. Then we will introduce how to design a chip, and discuss the test technique.