Dsp Processor Data Path Design

Current information technologies develop with incredible speed. The "information explosion" is not only a fashionable topic but also a practical problem laid before the computer scientists and engineers. The processing tasks of the signals, which are the carrier of all kinds of information, become more and more onerous during the past years. The DSP (Digital Signal Processor) meets the requirement of accuracy and real-time processing with its powerful processing capability and flexibility. As a result, it undergoes a great development.Quite some practical DSP products have been developed in foreign countries such as: TMS32O series by TI Inc., DSP56XXX series by Motorola Inc. and DSP16XXX series by Lucent Tech. In contrast, the research of DSP design in China is merely in the beginning. With this background, the author engaged himself in the research of the data path design of DSP. Subsequently, the author took part in the project of "TMS320C25 compatible DSP design?and assumed the responsibility of data path design.This paper starts from the general purpose DSP, of which architectural features and data path design methodologies are discussed. Related to the project of the author, research was mainly focused on the data path design of the TMS320C25 compatible DSP. The discussions include the design of multiplier, ALU and serial port; almost cover all the important aspect of the data path design.As to the design of the multiplier, the author referred to many documents and then analyzed several architectures of multiplier, which are suitable for VLSI implementation such as Booth multiplier, Wallace tree multiplier. Upon this basis, several multipliers with different architecture and data width were implemented respectively by VHDL. Feasible design plan was also brought forward after all of the important performance parameter had been thoroughly tested.A great deal of work has been done on the design of ALU and serial port. These contents may serve as a useful reference when designing an area-saving, anti-noise and performance-eminent circuit.