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Design And Implementation Of Short Frequency Digital Receiver Frequency Synthesizer

Posted on:2016-04-04Degree:MasterType:Thesis
Country:ChinaCandidate:J SuFull Text:PDF
GTID:2208330461984724Subject:Electronic and communication engineering
Abstract/Summary:PDF Full Text Request
The main function of frequency synthesizer receiver system is providing required clock signals and the local oscillator signal to the receiver baseband subsystem and the RF receiver subsystem.The frequency synthesizer is an important part of modern electronic systems,it is one of the key equipment determines the performance of electronic systems. With the development of modern communication technology, system takes more demands to frequency synthesizer. Low phase noise, high spectral purity, high-speed agility and high frequency resolution of the frequency synthesizer has become the main trend of frequency synthesis development.This paper uses a combination of DDS and PLL to realize frequency synthesizer technology,DDS provides a reference input signal to PLL, The phase detector chip integrated in the PLL includes digital programmable prescaler and divider, the structure combines the advantages of both DDS and PLL, while largely overcoming the shortcomings of both, which meet the design needs of the subject perfectly, and gives an detailed account of the design method of DDS and PLL, and design rules and electromagnetic compatibility of PCB system board.This paper firstly describes the concept of frequency synthesis technology, reviewing the development of frequency synthesis technology, introduces the development of the frequency synthesizer technology at home and abroad. Then introduces the concepts, structure, works etc, analysis to the main sources of phase noise and spurious. Then according to the requirements of the subject index, determine the design of programs and several core chip, analysis the feasibility of the program. Finally, tests several key performance frequency of synthesizer indicators.The final test results show that in the 41.4MHz-71.4MHz frequency range, frequency step is 1Hz, phase noise better than-127 d Bc/Hz(±20KHz), Stray better than-55 d B, hopping time equal or less than 3ms(1Hz frequency difference), meet the requirements of the subject performance indicators.
Keywords/Search Tags:DDS, PLL, phase noise, stray, frequency synthesizer
PDF Full Text Request
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