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Research And Development Of Dual Interface CPU Card Based On Logic ATE

Posted on:2014-03-26Degree:MasterType:Thesis
Country:ChinaCandidate:X JinFull Text:PDF
GTID:2208330434473255Subject:Integrated circuit engineering
Abstract/Summary:PDF Full Text Request
Smart card chip with dual Interface CPU can support both contact and contactles s mode, the different interfaces from these2modes can be controlled by the same CPU, and this can realize the selection for these2modes automatically. This chip is n ot only capable of characteristics from contact card such as high security, stable data t ransmission and large storage capacity, but also it has the characteristics from contactl ess card such as high transmission and access speed. So it can be suitable for the scena rios such as harsh environment, fast reponse, high security and complicated condition.Coverage rate need to be improved during the test period to guarantee the produc t quality in Integrated circuits manufacture. But as we known, this may spend more te st time and increase cost. Usually, the test cost will occupy50%~60%of the total cost of CPU card chip, so we need to decrease the test cost in order to improve product co mpetitiveness.In this paper, we focus on the test program development for the dual interface car d which was based on digital logic ATE. Here we aim at batch test for dual-interface CPU cards based on FM1232. FM1232is a dual-interface CPU card with32K non-vo latile memory, and the peak production can reach100,000wafers per day. If we adopt the ATE test with RF function, the product cost will be increased due to complicated function and long test period for this chip, so In order to expand production capacity a nd reduce the test cost, we develop the16parallel test program for wafers testing bas ed on Teradyne J750which only was equipped with two digital channel boards and a power supply board.Firstly, FM1232series product will be introduced, and overall test solution will b e planned according to product characteristics and test requirements. Secondly, the the oretical knowledge will be summarized during the test period such as Teradyne J750t est system hardware architecture and IG-XL software systems.The main part of the paper describes the test flow of pass production and how to realize the16parallel test program based on the Teradyne J750which only w as equipped with two digital channel boards and a power supply board.It analyze tes t solution for each module based on the principle of test, and difficulties and key p oints in the testing program such as test vectors programming and support automatio n for contact interface, test implementation based on digital logic ATE for contactles s interface test. Finally, the validation of test program will be shown, which include the analysis for the test data, this test program has been used in the batch tests to improve producti vity and benefit for company.this paper will provide the reference for test developmen t and research on integrated circuit domain.
Keywords/Search Tags:digital logic ATE, test plan, Dual interface, Parallel testing
PDF Full Text Request
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