Research On Circuit Reliability Design And Test Method Based On

High-energy particles and electromagnetic radiation from the space environment can have a great negative impact on the internal circuit of integrated circuit, which will bring soft errors of the circuit and system. Even though in the ground environment, these soft errors can also bring uncertain hidden problems to electronic system, reduce the reliability of system. Different kinds of devices and circuits will perform differently because the sensitivity caused by charged paticles is different. The SRAM-based FPGA is quite sensitive to the radiation of charged particles and this phenomenon is becoming normal with the IC chip manufacturing process steps below65nm. The decrease of operating voltage in radiation environment can make the problem of reliability become more and more important.In order to improve the reliability of FPGA, assessment platform need to be reasonable and algorithm need to be efficient which play a key role in reliability design. This dissertation starts from the cause of SEU, studies the fault-tolerant design test methods of industry. Based on the presented work above, the SEU injected tool and the test platform of circuit reliability are set up.Through the typical circuit test, this dissertation study the factors influencing the circuit’s reliability and the test method.First of all, this paper elaborates the subject’s background and significance, and introduces the radiation effect, classification of soft error and SEU mitigation methods. As for large complex circuits, the software simulation is an important method to study the circuit. This dissertation use OpenRISC processor which is a kind of open source processor as the study object for mitigation design. The logic error correction is implemented on OR1200. This paper utilizes TMR (Triple Module Redundancy) to protect registers inside a processor system which are very sensitive to the electromagnetic radiation. Besides, software-based SEU test platform are developed. By using this platform to the fault-tolerant module, the test results show that the software-based test platform is of highly efficient, and has a good performance for the complex circuits.As for the FPGA circuit which’s complexity is not high, combing the test platform with the information of FPGA’s substructure can further the study of the character of SEU. This paper gives a SEU injection test platform based on circuit simulation by using partial reconfiguration based on FDP FPGA. At the same time, some tests are given to the test circuit. By using the SEU test platform, the duration of SEUs can be managed, and then the character of SEU’s spread and reaction to different SEU duration can be studied.