System Design, Fpga-based Lightweight Network Monitoring

Modern society is going forward with an amazing speed, as result of the booming growth of public wealth and complexity of modern society, the demand of security products continuously expanding in the market。Along with the development of computer science and network technology, video surveillance system is upgrading from analog times into full digital times, and brings all kinds of digital surveillance applications into the field。In order to meet the security demand modern society, a kind of light weight digital network video surveillance system based on Programmable device and IP network is introduced is this paper。Using the newly developed SOPC (System on a Programmable Chip) technology and mature design methods of FPGA (Field Programmable Gate Array), this paper realized a pure digital network video surveillance system with the function of image acquisition, image processing, multi-channel video transmitting and receiving, split-screen video display。Traditional surveillance system with analog camera, video matrix and Control PC is replaced by a highly integrated system consist of CMOS image sensor, FPGA and embedded operating system。Comparing with traditional surveillance system, this newly developed system has smaller size, lower power consumption and much lower price which caters for the modern market changes and needs。SOPC technology is the core technology that build up the whole project。SOPC technology which based on Altera FPGA devices, high performance NiosⅡembedded processor developed by Altera and plenty of various IP (Intellectual Property) cores, allows developers to design and modify the project easily form system level。Specific characteristics are as follows:In the aspect of image acquisition All the modules involved in image aquisition in this system is designed by Verilog HDL (Verilog Hardware Description Language) coding, which allows the signals from CMOS image sensor can go right trough FPGA chip and passed by Avalon bus into software to be processed by NiosⅡprocessor The abandon of existing image capture chip not only cut off the rising cost, but also allows future upgrade development to redesign the project only by modifying the HDL code to fit in different CMOS sensors。In the aspect of image processing, Sobel edge detecting algorithm is adapted in this system and designed as pure hardware processing coded by Verilog HDL。This hardware image processing method has a much more higher processing speed and stability comparing to software processing running on NiosⅡprocessor。 In the aspect of data transmitting and control, embedded operating system running on NiosⅡprocessor coupling with UDP protocol took the main job of transmitting and receiving。With the mature network controlling of embedded operating system, image data and control signal captured in FPGA can be easily flow in to Local network and make the whole control flow more efficient。Also, operating system provide a platform for further system upgrade on surveillance various applications。...