Research And Implementation Of Modeling Method For Coarse-grain Reconfigurable Architecture

Traditional computer architecture includes general-purpose processor and ASIC(Application Specific Integrated Circuits). The former, with good flexibility, but can not meet the specific requirements of real-time applications. In contrast, the ASIC could get high-performance, but it can't implement a viarity of tasks for its fixed structure. Reconfigurable computing structure created in order to fill the lack of general-purpose processor and ASIC, application requirements can be adaptive for the construction of the internal hardware structure to obtain high processing performance and flexibility. Reconfigurable computing structure can be classified as coase-grain and fine-grain according to reconfigurable granularity.Complex DSE(Design Space Exploration) of CGRA(Coarse-Grain Reconfigurable Architectures) requires a higher level of abstraction to implement the system design decisions early. The thesis focuses on the research of the key problem of ADL(Architectrue Description Language) driven CGRA DSE. The primary work and contributions of the thesis include following three parts:Firstly, we proposed a novel ADL modeling method for CGRA, with special structure and computing property. Respectively, we discussed the modeling method about structure and computing features of CGRA, and proposed function configure operation and interconnect configure operation to model CGRA function and behavior, with the resource used by them to model CGRA structure. Through analysis, we showed that the proposed modeling method has good adaptability to CGRA. Then brifly introduced the CGRA called ProDFA proposed by our research group, and designed the model of ProDFA microarchitecture based thesis'method.Secondly, Designing and Implementing ADL model for ProDFA based on compiler and simulator framework Trimaran. We chose the Trimaran as implementation toolchain for ADL driven CGRA DSE. We implemented ProDFA ADL model with HMDES, by designing simple coarse-grain function of ProDFA with the architechture space supported by Trimaran currently. And then, Experiment was designed to verify the validation of the proposed modeling method and the use of Trimaran framework as the feasibility of implementation toolchain. This work had laid a solid foundation for the next research work about ProDFA coarse-grain function custom and compiling and mapping strategy.Last, we instantiated ProDFA structure to cipher processing application, and implemented a system-level simulator. By implementing the cipher arithmetic AES and DES reconfigurable system in the system-level model which is based on open instruction set simulator, we got some propert statistics. It was helpful for designing ProDFA accurate simulator and expanding the architecture space supported by Trimaran.The achievements of this paper have important practical and realistic significance to the research work of ADL diven CGRA design space exploration.