Research And Hardware Verification Of Cmos Image Sensor White Blance And Contrast Enhancement

Combined with CMOS image sensor (CIS) to its own characteristics and development status of known, will CIS chip with integrated image processing module is the main trend of its development. Image processing algorithms by optimizing treatment effectiveness in improving the algorithm and reduce the hardware consumption, to avoid the noise of the CIS have a greater impact, helping improve the image quality, save space and power consumption.In this paper, two important image processing module: Auto white balance module and the contrast enhancement module for algorithm optimization and hardware verification, mainly include: proposed algorithm, software modeling, results analysis, precision analysis, hardware implementation, FPGA test platform structures hardware debug and verify the results analysis and DC and integration.In white balance: the paper presents a color based on automatic white balance algorithm, more filter blocks of color within color point, color temperature makes the statistics more accurate. Which formula selected for the CIE 1976 Lab color difference formula, according to hardware requirements, fitting with piecewise approximation algorithm, and the fitting accuracy and moderating effects of subjective evaluation and objective analysis.Combined with the exposure of the proposed algorithm for automatic contrast enhancement, connected to the image acquisition and image post-processing areas of the field. The former by reducing the exposure of the target value, increase the area of information capture high-brightness capability; the latter to ensure no loss of gray-scale before and after strengthening under the premise of enhancing the low intensity region, the purpose of achieving both bright and dark regions. Finally, from the standpoint of both subjective and objective, to determine exposure parameters adjusted results are compared.To test the hardware real-time two algorithms work, built a FPGA test platform. Platform Building work includes writing and debugging the following auxiliary modules: control signal transmission module, interpolation module, automatic exposure module, gray world, white balance module. Through the white balance and contrast enhancement module hardware debug module analyzing the results show significant moderating effects of the two algorithms, the module is working correctly, meet the design requirements.DC FPGA synthesis and integrated are designed to meet the timing requirements that, in the lower hardware overhead and attain a better image effect, the scheduled completion of the design goals can be integrated with the CIS module.