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Design And Implementation Of A Data Storing System For Sar

Posted on:2011-07-29Degree:MasterType:Thesis
Country:ChinaCandidate:Y MaFull Text:PDF
GTID:2198330338489959Subject:Information and Communication Engineering
Abstract/Summary:PDF Full Text Request
The SAR is a new radar system geting the high range resolution by the Broad Band signal and the high azimuth bearing resolution by the Synthetic Aperture. In order to image the radiated aim or area with high resolution in a planar surface, huge echo data is the trait making SAR different from any other radar system. Therefore, there must be a high speed of data-storing system in the SAR, so that it can store the multitudinous data with real-time guarantee.Design and implement of a real-time data-storing system for SAR is proposed in the article. The data-storing system adopts the NAND FLASH chip as the main storage carrier, which contains 4GĂ—8bit capability in one chip. The methods of "parallelling-operation" and "bus-line" are used in the design to speed up the data-storing. Multi interfaces are appended to the system. The appended interfaces could be used to save sampling-data derectly and replay the data saved in memory, besides data-communion with data-processing system. The system uses FPGA as the controlling-core to process the operation for FLASH chip and transmit data. Otherwise, DSP chip is used as the inteface between the data-storing system and data-processing system, and the ECC is completed in the DSP. In the end, the operation for FLASH chip and the method of "bus-line" is tested.The system not enhances the two basic performance of capability and data-storing speed only, but also inreases the universality.
Keywords/Search Tags:SAR, FLASH, FPGA, DSP, Parallelling-Operation, Bus-Line
PDF Full Text Request
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