Low Power Design And Verification For CMMB Channel Demodulation System

Mobile television broadcasting has become a brand new multimedia services and a hotspot in the industry. CMMB as the national standard, was issued by the State Administration of Radio, Film and Television with independent property rights. CMMB standard has adopted STiMi technology as its core transmission technology, which is researched and developed independently by nationality, and it's better adapted to the national market. Because of the prospect in mobile digital television system and its portable feature, low power design for the channel de-modeling chip has become the most important issues during the period of terminator's designing.This paper first introduces the physical level structure and sub-system of CMMB system, then deeply researches the architecture of the typical CMMB channel demodulation, and makes the every function model of the system analyzable and complete.Based on the low power design methodology for SOC design, this paper researches some standard low power design methods, such as, clock gating, power gating, gate level optimization, multi-voltage, multi threshold voltage. And analyzing UPF(Unified Power Format) and CPF(Common Power Format), which are the most powerful and prospering power intent design flow in industry.According to the feature of CMMB signal transmission, this paper indicates the low power design project for the CMMB channel demodulation system, this project has based on multi power domain solution and implemented the power intent through the UPF, divided the chip into 5 maintain power domains, and then switches power domain status depending on the services processing by using clock gating, power gating and so on, and proposed a method of hardware and software cooperating for system power management, in order to save the power.This paper proposes the complete verification project, including the environment which based on the low power interrupt processing program and different simulation vectors for system data verifying. The result could be sampled through the"monitor"method, that verifying the correctness of low power design, and"wave"method, which could be verified function correctness through under low power status. The performance of system power has improved through power analysis by"Prime Power", compare to other 60mW of the average consume, this chip has the 30mW average consume, proving that this kind of low power design project has obviously advantage.