Design Of Voltage Controlled Oscillator For CMMB Receiver

Mobile broadcasting systems is being developed rapidly in many countries during recent years. The system for fixed and portable reception of digital television, known as digital video broadcasting -terrestrial/handheld (DVB-T/H), has been available in Europe for several years. China Mobile Multi-Media Broadcasting (CMMB) is a similar standard to DVB which also uses Ultra-High Frequency (UHF) band (470～798MHz) for territorial signal transmission.Because of such broad band requirement, a frequency synthesizer with wide tuning range is necessary to provide corresponding local oscillation (LO) frequency available for frequency down conversion. Wide band voltage controlled oscillator (VCO) is at the heart of frequency synthesizer. One of the most effective ways to achieve wide tuning range and low tuning sensitivity at the same time is to use a switched-capacitor bank while keeping the varactor size small in LC tank. Dual core (actually two VCO cores) application may extend the tuning range further. In this thesis, a dual core VCO with low tuning sensitivity is proposed.For receivers with high dynamic range requirements, the VCO must achieve a correspondingly high spectral purity so as not to degrade receiver's sensitivity excessively. This is a big challenge since conventional wideband VCO can not achieve excellent phase noise over whole frequency range as the narrow band VCOs have done. Classical phase noise models are used in this thesis for analyzing the origin of phase noise, and several methods of reducing phase noise are discussed. To interpret the operation of VCO in detail, basic positive feedback and negative resistance mechanism is also involved. Large signal and small signal analysis is applied to explain start up condition for VCO.Proposed VCO operates at fourfold LO frequency so two current mode logic (CML) frequency dividers are used. Implementation of divide-by-2 circuits is introduced. There are also two buffers following dividers to provide large voltage swing for the next stage. Current consumption of all circuit blocks is optimized to achieve low power requirement.To overcome non-ideality in VCO, additional circuit is used. A regulation amplifier is added between power supply and supply voltage of VCO, which reduces the power supply sensitivity and its phase noise contribution. Carefully layout drawing is very important since parasitic effects should be decreased as much as possible in order not to degrade circuit performance. A brief discussion of VCO layout is in the end of this thesis.Both pre-simulation and post-simulation results are included to support the analysis of this thesis, and the proposed specifications are satisfied.