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Design And Implementation Of Area Array CCD Imaging Driver And Periphery Circuit

Posted on:2010-10-24Degree:MasterType:Thesis
Country:ChinaCandidate:Q WeiFull Text:PDF
GTID:2178360302959463Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
Because of the advantages of wide spectral response, large dynamic range, high sensitivity and so on, the charge coupled device (CCD) has been widely applied to the fields of image sensing and non-contact measurement. One of the key issues of CCD application is the design of CCD timing-driven circuit. Driving area array CCD is more complex than linear CCD. Area array CCD needs more driving pulses with rigid phase and multi-level voltage. So there are some difficulties to design an area array CCD driving circuit with hign precision. The paper takes two ways to drive interline-transfer CCD and designs the periphery circuit.Firstly, working principles and performance indexs of familiar area array CCD is introduced. Considering the principle of low cost and high performance, an interline-transfer colour CCD ICX098AK is selected as studying image sensor, then overall design project of the driving and periphery circuit is given in this paper.Secondly, according to the driving timing of ICX098AK, corresponding driving timing generator based on CPLD is designed. Complex Programmable Logic Device is chosen as the hardware platform, and driving timing generator is described with VHDL language. At the same time, special driving chip is used to drive CCD, and its serial interface configuration program is written to configure the fuction modes of driving chip via singlechip. Then the two driving hardware circuits are designed and their output driving pulses are contrasted in the paper.Thirdly, CCD video signal processing circuit and power supply design are accomplished. On the basis of analyzing characteristics of CCD output signal and denoising technology of correlated double sampling, special video signal processor is used to fulfill amplification, denoising and quantification of CCD signals. Then intelligent electrical source module which supplied steady multi-level voltage and controllable power-on order is designed.Finally, printed circuit boards are produced. Driving pulses can meet the timing requirement of CCD regular work and analog video signals are put into digital form by hardware circuit debugging. Then problems and resolvents in debugging process are summarized, and the shortages of system are analyzed, which provide credible gist of development in the future.
Keywords/Search Tags:Area array CCD, Interline transfer, Driver, CPLD, signal processing circuit
PDF Full Text Request
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