Study Of High-k HfO₂/SiO₂ MOS Device Properties

In the 45nm, and even smaller process nodes, traditional SiO2 gate dielectric thickness of the oxide layer thinning to the atomic-scale range, electronic direct tunneling effect could lead to gate dielectric leakage current rapidly increased and device reliability decreased, seriously hindered the size of the device in accordance with Moore's Law trend of diminishing. Metal gate/high-k gate dielectric material combinations to replace the traditional polysilicon gate/SiO2 combination, has become an effective way to overcome these problems.Traditional multi-crystalline gate/SiO2 gate dielectric device's shortcomings are raised, however, metal gate/high-k gate stack devices are studied such as how to choose the new high-k gate dielectrics and metal gate. This paper simulates the metal gate/high-k gate stack device characteristics with the simulation software ISE-TCAD: At first, HfO2 is adds into the materials library; Second, the device model parameters are analyzed and optimized; Third, the substrate doping concentration is given. In addition, simulation studies show that when the defect density of less than 1012cm-2, the device is able to maintain a good transfer characteristics.Studies have shown that the new ultra-thin atomic layer deposition HfO2/SiO2 stacked gate dielectric film has better-quality surface-interface properties, so metal gate/high-k gate is extremely likely to replace the traditional polysilicon gate/SiO2 of MOSFET.