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The Design Of 16b 480uW 0.35um Audio Delta-Sigma ADC

Posted on:2011-02-08Degree:MasterType:Thesis
Country:ChinaCandidate:F YiFull Text:PDF
GTID:2178360302489814Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
As fast growing of consumer electronics market,System-On-Chip are widely applied to portable battery powered equipments and wireless communication products. As a bridge between analog environment and digital processor,audio analog-to-digital converter(ADC) is getting more and more attentions.And lots of efforts were put into its high-resolution low-power design.Based on reviewing and analyzing of principles ofΔ-ΣADC as well as its development and trend,this thesis proposed a high-resolution low-power audioΔ-ΣADC,which is capable of achieving resolution of 16 bit with power dissipation less than 500uW.Aiming at design goals,through comparing the feed-forward structure with feed-back one,a feed-forward structure is chosen forΔ-ΣADC due to its lower power. Moreover,system parameters including over sample rate,system order and quantization level are analyzed and precisely adjusted to reduce power dissipation further.Based it,a low power system architecture is built.By dint of building the ideal analytic model forΔ-ΣADC using MATLAB SIMULINK,the system timing was determined and tested.The effects of some nonidealities in real circuit on system were analyzed and estimated.For instance,they are the thermal noise in sampling capacitors,the effect of the finite gain of operational transconductance amplifier(OTA) on transfer function,the effect of the finite gain bandwidth of OTA on errors during signal establishing,the effects of the finite slew rate of OTA as well as the charge injection of MOS switch on performances ofΔ-ΣADC.Based on it,specifications of modules including OTA,common feedback circuit,comparator,clock,and small gain feedback circuit were proposed and their circuit level design was completed.Circuitry was designed and completed in TSMC CMOS 0.35um Mixed Signal process under Cadence Virtuoso environment.The output digital signal was estimated by fast Fourier transform with 8192 point.Results showed that the maximum signal to noise ratio of 105dB with dynamic range of 106dB was achieved.Total power is 480uW.Figure of Merit of audioΔ-ΣADC achieves 4416uJ.
Keywords/Search Tags:Audio, △-∑ADC, High Resolution, Low Power
PDF Full Text Request
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