A Low Bit High Speed A/D Converter For A UWB Communication System

Nowadays, Short-range wireless network is generally indoors, or relatively closed environment, there is no large-scale integration of wireless wide-area infrastructure, but this situation is expected a breakthrough with the development of UWB (Ultra Wide Band, UWB) technology. UWB technology as a major means of high-speed short-range wireless transmission will be dominant in the future of wireless communications, and widely used in the field of consumer electronics and computer application fields. UWB technology focus on the "three low and one high" characteristics: low-frequency density, low-power, low-cost and high-speed. Based on the characteristic that pulse signals have a high compressed ratio in time domain and a high instantaneous SNR, a method of UWB receiver by low bit sampling is proposed.The main purpose of this paper is to design an ADC for system-on-chip integration of UWB. After analysis and comparison of several typical structures of ADCs, it is easy to conclude that the parallel structure is suitable for medium or low-resolution and ultra-high sampling rate ADCs, which have the characteristics of simple structure, high conversion speed and low cost, provide a best option for UWB communications systems. Early results show that under certain conditions, 2-bit sampling of received signal has the loss of only 0.5dB. Thus, a 2-bit resolution, 4GS/s low-power parallel ADC is proposed, which is the main power system sources, but how to achieve low-power and high-speed are difficult problems.The proposed ADC use the non-time-interleaved architecture, therefore the digital calibration is not necessary, moreover, the usage of differential low-swing in analog circuits and CML in digital part, thus make sure of high speed conversion rate, low power consumption and circuit noise. In addition, differential reference ladder is designed to reduce the feed-through caused by the input signal of high frequency. The design uses SMIC 0.18μm 1P6M CMOS process manufacturing, power supply in the 1.8V power consumption of 34mW. The ENOB of the ADC can achieve 1.86 bits@ 1GHz input, 4GS/s sampling.