RSA Encryption Chip Design And Implementation Based On FPGA

The RSA cryptography is a quite mature public-key cryptography system at present. It widely applies in security and identification field. The modular exponentiation algorithm is the key of RSA cryptography, which is performed by a series of modular multiplication.Research RSA cryptography carefully, and then implement it based on FPGA. The design selects Montgomery modular multiplication of improved version and sequentially calculates modular exponentiation by implements one Montgomery multiplication module. To eliminate the unwanted effect of the parameter which is introduced by Montgomery modular multiplication makes the conversion of Montgomery of Residue System. SRT division is selected to calculate the constant which is used in the conversion.The data path and the controller of the RSA encryption chip is designed according to algorithm which selected and the data process flow of RSA. The data path is consist of shift registers which is to store input and immediate results as well as multiplexer which is to selected the path. Its core part is the Montgomery multiplication module and SRT division module. The design of controller is closely related with the RSA data processing flow and data path. The entire flow is approximately linear, has the concurrent advancement partially. According to this, the controller uses the multiple limited state machine models, the master mode machine control entire processing flow, secondary state machine control partial concurrent advancement.Modelsim is used to make simulation on the RSA chip which the key length is 1024 bit. The synthesis result showed that the utmost clock frequency is 13.5MHz.the average encrypt speed is 8 times per second.