The Design Of A Resonant Mode Power Management Chip

Electronic technology is developing rapidly today. Electronic equipments have close relationship with living and working of people, while electronic equipment can not be separated from a reliable power supply. With the development of IC, a variety of electronic devices reduce the size , need provide energy powers with small size, high reliability, high efficiency characteristics urgently. However, the traditional linear power system has been unable to meet the needs in terms of size, performance and reliability Because of the reasons above, the resonant technology of soft-switching is developing quickly which is different with the traditional hard-switching converter , this technology which is playing very important role in the field of switching power supply has been widely used in computer, communications, radar, electronic equipment, household electrical appliances.The basic principles of power and work patterns have been studied and analyzed in this paper. Also the Hard-switching PWM converters, soft-switching and resonant transform technology are described. A kind of resonant mode power management chips has been designed, which is a versatile system for resonant mode power supply control. This device implements frequency modulated fixed-on-time control schemes as well as a number of other power supply control schemes with its programmable features. A precision voltage reference, a wide-bandwidth error amplifier, a variable frequency oscillator, a dual output driver, and a programmable toggle flip-flop is included in this chip, which also contains an uncommitted comparator ,one soft start circuit, a fault management module and one under voltage lockout circuit. All these parts improve the reliability of the chip, realize the function of variable frequency control and timing control, which could react immediately as well when over voltage ,under voltage and errors happen.The principles of every module has been described , and the circuitry of every module has been implemented in this paper, which are simulated by EDA tools. The result shows that this chip is designed to match the demanding of request.