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Design Camera Scale In SOC Environment

Posted on:2010-07-10Degree:MasterType:Thesis
Country:ChinaCandidate:L WangFull Text:PDF
GTID:2178360275997678Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
For nowadays multimedia industry, although the market is still prosperous, many domestic and international factories entered in this field in the last few years. Then the market competition of multimedia was more and more vigorous. The market inevitably sank into the embarrassed situation of the price jump into water. Facing the price war of multimedia, when factories reduced the cost of production, they constantly created new function. This is also an exit for consumer electronics products. Under this environment, multimedia equipments with camera interface and camera scale functions will be the developing direction.The camera scale is mainly used for the camera IP and multimedia control chip, its function zooms out the output data of the camera IP in order to show at the screen. It can apply in MP3, MP4, mobile telephone etc. In multimedia control chip's SOC designs, camera scale has become an indispensable part and plays a very important role in the performance of the overall electronic system.In this paper, Top-Down design process is researched, which includes system partition, arithmetic MATLAB simulation, coding, function simulation and verification, logic synthesis etc. Different EDA tools are used on different design phases, including NC_verilog,Debussy,Design Compile and so on.In practice, this paper gives a detailed design implementation of camera scale modules including definition and configuration register, TOP module, arithmetic module, generator, synchronous FIFO (First In First Out). In camera scale design, optimization on specific module design is carried on with regard to area, speed and stability. For example, in low power design using CLKGATE design. In the end Logic Synthesis, Timing simulation and analysis have also been performed. The result shows that the design specification is reached. It can calculate zooming out multiple according to input pixel and output pixel, support bypass function and support many kinds of error correcting and interrupt. It also can support RGB565,YUV420,YUV422_ONE_CHAN NEL, YUV422_THREE_CHANNEL inputting data modes. For YUV422_ONE_CHA NNEL, data arranging supports four modes: YUYV,YVYU,UYVY and VYUY. During the data processing, it can support mode switching.
Keywords/Search Tags:camera scale, FIFO, FSM, stimulation and verification
PDF Full Text Request
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