Design Of CMOS RF Quadrature Oscillator

In recent years, with the rapid development of wireless correspondence network, the research to the radio frequency transceiver enters the superheating condition. At present, many radio frequency transceiver structures are proposed in domestic & foreign area, like superheterodyne transceiver, zero-intermediate frequency transceiver, low-intermediate frequency transceiver and so on. The radio frequency quadrature oscillator is the most important constituent of radio frequency transceiver, therefore we will have the vital significance to research on it. In the foundation of profoundly understanding the present development situation of the oscillator in domestic and foreign area, carefully studying the oscillator phase noise theory,principle that quadrature signal produces as well as low voltage & low power loss design method, the author designs two new quadrature difficult oscillators, with the characteristic of low phase noise, low voltage & low power loss,then uses ADS and Cadence to carry on the simulation confirmation and layout design for these circuits. The main research work of this article is as follow:1) In the proposed new 2.4-GHz CMOS quadrature difficult Voltage-controlled oscillator, two identical negative-resistance oscillators are coupled to each other via two capacitors in such a way that quadrature differential signals are generated. Since capacitor is used as coupling device, the proposed circuit has the advantage that no extra noise sources and power consumption are introduced to the circuit in the coupling process. Simulation results are presented for circuits designed with CMOS technology. The simulation result indicates: the circuit draws 7.2 mW from a 1.6-V supply. It can satisfy the harsh phase noise request of zero-intermediate frequency receiver if the phase noise lowers to - 128.4dBc/Hz@1MHz.2) Proposes one kind of new high frequency,low voltage & low power comsuption quadrature difficult LC Voltage-controlled oscillator, in this proposed circuit, two identical negative-resistance oscillators are coupled to each other via diode, in such a way that quadrature differential signals are generated . Its voltage supply may lower to 0.8V, the power consumption is only 2mW, and the phase noise is - 111.4dBc/Hz@1MHz, this proposed circuit can be applied in the ultra-wide band frequency synthesizer, which can satisfy the performance requirement of the ultra-wide band frequency synthesizer. 3) The proposed circuits are simulated in TSMC RF CMOS 0.18μm technology by ADS2006, and Cadence is applied to the layout design and post-layout simulation, which confirms the feasibility of proposed circuit.