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Design And Realization Of SAS Expander

Posted on:2009-05-19Degree:MasterType:Thesis
Country:ChinaCandidate:K ChangFull Text:PDF
GTID:2178360275972380Subject:Computer system architecture
Abstract/Summary:PDF Full Text Request
SAS (Serial Attached SCSI) is a storge interface designed for enterprise application. SAS Protocol combines advantages of parallel SCSI technology and serial connection technology, and is a multi-layer point-to-point protocol whose basic architecture is serial communication protocol. The recent popular SAS storage system is a single host mode in which SAS controllers are directly connected to terminal devices. This mode is limited by port number of the controllers and the bandwidth. Therefore, high reliability, great flexibility and high expansion capability of SAS system cannot be brought into full play. SAS expander, an exchange device defined in SAS Protocol can not only expand the storage capability of SAS system, but also improve the system bandwidth by several folds via wide link.In the thesis, SAS expander system is developed with embedded system project. The overall system is designed from the aspects of hardware and firmware and then a solution is concluded. For hardware, PM8398 chip integrated with MIPS microprocessor is applied as the core chip of the expander. System reset and interrupt generating are controlled via complicated PLC. Quality of power and signals of the high speed circuit board are ensured by utilizing low-pass filters, terminators and magnetic beads. For firmware, local boot & load mode with double images is applied to improve ThreadX response mechanism of the real-time OS, simplify thread state set of ThreadX and add priority characteristic of messages. Thus the complexity of application development is simplified and the reliability of the system is increased.One important performance indexes of the real-time system is the quick response to interrupt. In order to realize this significant performance index in real-time embedded OS platform, the author proposes a method using the interrupt-delay-queue to reduce the interrupt response time. Through delaying cache of interrupt operation, interrupt-delay-queue method realizes asynchronous operation of interrupt program and kernel program of the OS to the key data.
Keywords/Search Tags:Small Computer System Interface, SAS Expander, Embedded System, Complex Programmable Logic Device
PDF Full Text Request
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