Study And Simulation On Reliability Of Poly-Si Thin Film Transistor

With the development of display technology and the fabrication technique, high electric performance p-Si TFTs were used broadly and considered as the perfect substitute for a -Si TFT. Comparing to a-Si TFT, p-Si TFT has the merits such as high field effect mobility, high integration and high speed, high definition display, n channel and p channel capability, low power consumption and self-aligned structures. With these good characteristics, p-Si TFT LCD could provide brighter and stable image. Especially because of p-Si TFT having the characteristic of working with p-channel and n- channel,it could be used in LCD display and OLED display. It is believed that p-Si TFT will be the main type in the future panel display.With the device scaling down to deep-submicrometer,hot carriers generated near the drain by high electric field induce degradation.The degradation such as threshold voltage shift ,decrease of transconductance and drain current is due to acceptor interface states in the grain boundaries and at the Si/SiO2 interface by breaking the weak Si-H and Si-Si bonds,finally leading to the failure of the device and circuit.The reliability of the device circuit system induced by hot carrier effect is long-term failure.By using the TCAD tools, we studied the hot carrier effect by establishing the device structure through process simulation software Tsuprem4, calculated its electricity characteristic by device simulation software Medici. Fsirstly,as the grain boundary in the polysilicon layer ,the influence of density of traps on hot carrier effect was studied.The results showed that improving the quality of polysilicon layer can well enhance the device's performance.Secondly,taking into account of effect of traps in the boundary,the model of MOSFET's degradation induced by hot carrier effect on static stress was modified,and then the degradation of p-Si TFT was simulated with this model.The results simulated can inosculate with experimental results in the broad literatures.In addition,the influence of parameters of source/drain extension structures on reliability of p-Si TFT was investigated.Consider different thickness of gate oxide of LDD p-Si TFT,the results show that the change of gate oxide thickness and degradation induced by hot carrier effect is not a linear relationship.The influence of implant doses of extension region on hot carrier effect is thoroughly studied.It is proposed that higher dose condition can change the region of devive's degradation,leading to lower sensitivity to hot carrier effect.