Research On Delivery Standards For High-Dependable IP Cores

With the increasing complexity of digital system, intellectual property (IP) based design becomes the inevitable choice to reduce development cycle. However, there are few companys which are able to supply all the necessary sources that are applied to form the integral SoC (System-on-Chip). Therefore, IP reuse has become an effective method to increase efficiency in huge IC designing and the transfer of IP cores has also become a key link in the design of the system chips. The critical aspect to win the ?time to market and to implement commercial goal is just locating on how to transfer IP cores successfully to gain various needed functional modules, and how to integrate those functional modules into application system fast and conveniently. So the quality of IP cores is critical to the success of IP delivery and reuse. This paper aims at methods for developing high-dependable IP cores.Firstly, the paper descripts the definition of high-dependable IP cores, and provides the formal specification description of IP cores. That description covers the flowing fields. They are integral design and transfer documents, scipt files of verification and synthesis, models in different levels, highly configurability, general standards of bus interface and test, repeatable verification and testing, good coding stytles.Secondly, the paper does a comparative research on the international IP standards and then takes a proposel that when organizing the IP delivery items we should be based on the specification of deliverable items and document structure, which are published by Information Industry. So when the IP providers transferring the IP cores, they not only develive the functional information about the modules, but also protect their intellectual property. Those can ensure the high dependability and operability in the organization of documents.Thirdly, the paper makes a research on the formal specification verification. We adopt ABV (Assertion Based Verification) to perform the functional verification. ABV not only help us to find the error easily and fast, but also be able to achieve the verification based on function coverage and increase the adequacy of the verification. Those features can ensure the high dependability in function.At last, the paper presents an operable solution according to the above aspects, which highlights the formal specification in IP documentations. And then we design a Timer core. After that we valuate the timer by VSIA QIP 3.0 and the quality specification of the Information Indusity. According to the evaluation result, we can come to a conclusion that our solution is practicable.