Research On Method Of Precise Time Stamping For Clock Synchronization In Local Area Network

With the rapid growth of modem industry and manufacture scale, the demand of integration of manufacture automation as well as other information is increasing. Due to its highly reliability, distributed control system has become the best solution. These fields need high-stability and high-efficiency to accomplish critical works and tasks. Thus the requirement for consistency of clocks in distributed system is extremely strict and the synchronization accuracy of demands is increasing.This thesis begins with the problems based on how to achieve high-precision clock synchronization network technology, and then analyzes the principle of the existing net- work clock synchronization technology and the accuracy of synchronization. Then this thesis proposes that one of the most critical factors is the delay and jitter of operation system and protocol stack base on IEEE1588 standard. To eliminate the delay, this thesis presents a strategy which is used to stamp the time of synchronous message arriving at or departing from the node in physical layer of protocol stack. A test platform has been implemented with the hardware conditions, which can demonstrate the time stamping strategy in physical layer. This thesis mainly researches the following aspects:This thesis analyzes the impact of factors of synchronization accuracy and emphasizes on the solution of time stamping in physical layer to eliminate the delay and jitter.This thesis analyzes the characteristics of synchronous messages of IEEE1588 protocol and proposed solutions of time stamping in physical layer.This thesis implements a hardware test platform with FPGA based on Nios II embedded processor and the function of precise time stamping logic based on SOPC, then designs embedded software based onμC/OS-II and LwIP, verifies the feasibility of time stamping strategy.