Design Of Bias Circuit And Preamplifier On MEMS Silicon Microphone

With the explosion of the wireless communication various portable products are used widely, and the main features of these products are smaller and thinner. Complied with electric condenser microphone, the MEMS silicon microphone is more satisfied with the requirement of modern products, due to precise controlling of its structure size, small volume, low cost, good repeatness of technology and easy realization of batch manufacturing.In this paper, Based on the MEMS microphone which was manufactured by Tsinghua University Microelectronics institute, the bias circuit and preamplifier were designed, so to constitute a system converting sound signal into electrical signal. The biased circuit is a charge pump system made up of a oscillator , D trigger, a charge pump circuit. By 3.3V of power supply, about 11V output voltage was generated by the biased circuit to maintain a MEMS capacitance working normally. So the nA electrical signal was generated by the MEMS silicon microphone at the press of sound. The signal generated was so low to drive power amplifier behind directly, so a Low Noise Amplifier(LNA) was needed to magnify the electrical signal and then to be input into the power amplifier. According to the practical case, the common gate preamplifier was designed to fulfill magnifying from current to voltage. Simulation showed the close loop gain of the preamplifier was 20dB and input noisy was 10^-11A/HZ^1/2 to meet low noisy.Based on the finished analysis of circuit principle and circuit design, the functioning features and key parameters of the submodel and the whole circuit were simulated using the ASMC 0.35μm BI-CMOS technology parameters by the simulating software of Cadence' s spectre. The simulation showed that the design complied with the scheduled requests and verified the correctness of the theoretic analysis and design feasibility. Based on Virtuoso Layout Editor software in Cadence System finished Layout designing, the layout was designed. Based on the finished design of layout, DRC and LVS were verified by use of the software of Cadence' s Dracula. Then, the ready has been for Tape-out the chip.