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Digital Down Conversion System Design Based On TD-SCDMA

Posted on:2009-12-19Degree:MasterType:Thesis
Country:ChinaCandidate:Y Y LiFull Text:PDF
GTID:2178360245968627Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
With the development of digital signal processing (DSP) and microelectronics, software defined radio (SDR) obtains achievements apparently in recent years, which attracts a good many domains. There are many crucial technologies involved in SDR, including DSP, smart antenna, data acquisition, digital down conversion (DDC) and so on. Limited by analog to digital conversion (ADC) devices, digital intermediate frequency processing (DIF) performs channelization of wide band signals in muilt-carriers and decimation of narrow band signals to reducing computational complexity as the joint of RF and base-band. DIF has been one of indispensable part in receive link of wireless communication.In this paper, a DDC implement scheme based on multistage filter bank is provided. This scheme use multistage decimation structure which can reduce the needed target of filters, make the quantity of data what should be accounted and storage smaller, and make the structure of the whole system more easier.Based on the Time division-synchronous code division multiple access (TD-SCDMA)communication standard, the scheme is simulated and optimized with MATLAB. With the parameters gotten from MATLAB simulation, the RTL design is developed.Firstly, the generalizing SDR architecture and theories of DIF are presented. Through detailed mathematic analysis, the multistage filter bank structure is demonstrated. This scheme use a three-stage decimation module including cascade integrator-comb filter decimate group (CIC),half band filter decimate group (HB),and root raised cosine filter decimate group (RRC).The system also uses a five-stage CIC filter to make the performance better. Then the design is described by hardware code. At last, the conclusion and improvement is discussed.
Keywords/Search Tags:multistage decimation, DDC, TD-SCDMA
PDF Full Text Request
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