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Simulation Of Electrical Properties Of Metal-Ferroelectric-Insulator-Semiconductor(MFIS) Structure Device

Posted on:2009-12-24Degree:MasterType:Thesis
Country:ChinaCandidate:J J ZhangFull Text:PDF
GTID:2178360245490362Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
Recently, much attention has been paid to the non-volatile memory during the development of information technology. Among the non-volatile memories, the ferroelectric memory has been considered as the most promising non-volatile memory device due to its attractive properties such as high access speed, low operation voltage and low power consumption. The ferroelectric field effect transistor (FeFET) with metal-ferroelectric- insulator-semiconductor (MFIS) structure has drawn much attention because of its advantage such as nondestructive readout and high storage density. In this paper, we focus on the gate stack structure of the FeFET namely a MFIS capacitor. Using the semiconductor simulation software and the conventional Lue model respectively, the properties of MFIS capacitor such as the capacitance-voltage (C-V) characteristic and memory window are simulated. For the neglect of the history-dependent electric field effect in the previous traditional model, an improved model of C-V characteristic of MFIS capacitor is proposed. The main work and results are given as follow.(1) Using the semiconductor device simulator Silvaco/Atlas and the conventional Lue model, the effects of applied voltage and insulator layer on C-V characteristic, polarization-voltage (P-V) hysteresis loop and memory window of MFIS capacitor are simulated, and the origins of these effects are qualitatively analyzed. The simulation results show that C-V characteristic and memory window of MFIS capacitor are affected by the polarization status of ferroelectric layer. And a high applied voltage, thin insulator layer and high-κinsulator material will improve the performance of MFIS capacitor. However, both the Silvaco/Atlas and the Lue model are based on the Miller model, and the simple tanh type equations are used to describe the polarization behavior of ferroelectric layer so that the history-dependent electric field effects are neglected. Therefore, limitation exists in the simulation when the MFIS capacitor is under the unsaturated status, and they are not verified by the experiment yet.(2) For the fault of the neglect of history-dependent electric field effects in the Lue model, an improved model of C-V characteristic of MFIS capacitor is proposed. In the model, to consider the history-dependent electric field effects, the coercive field distribution of ferroelectric dipoles is used to describe the polarization by applying the distribution function integral method. And considering the polarization symmetry of ferroelectric layer, the description of the ferroelectric polarization behavior in the Preisach is revised with the superposition approach. Taking the continuous boundary condition of the electric displacement and Gauss's Law into account, the physical behavior of the silicon substrate is combined with the polarization behavior of ferroelectric layer. Starting with the first Maxwell's equation, the improved model of C-V characteristic of MFIS capacitor is obtained.(3) According to the improved model, the polarization behavior of ferroelectric layer, the C-V characteristic and memory window of MFIS capacitor for Pt/SBT/ZrO2/Si and Pt/BLT/MgO/Si structures are simulated by using the MATLAB program, and they are compared with those of the Lue model and the experiment results. The simulation results show that the improved model can predict the polarization behavior of ferroelectric layer, the C-V characteristic and memory window of MFIS capacitor more accurately. Compared with the Lue model, the physical meaning in the improved model is more distinct. This work may offer useful guidelines to the design and performance improvement of MFIS capacitor and other MFIS structure devices.
Keywords/Search Tags:MFIS capacitor, Silvaco/Atlas, C-V characteristic, Memory window
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