TCAD Simulation Of Ferroelectric Field-Effect Transistor

Silicon technology has advanced at exponential rates both in performances andproductivity through the past four decades. However the limit of CMOS technologyseems to be closer and closer and in the future we might see an increasing number ofhybrid approaches where other technologies add to the CMOS performance, whilemaintaining a back-bone of CMOS logic. Ferro-electricity in ultra-thin films has beeninvestigated as a credible candidate for nonvolatile memory thanks to the bistability ofpolarization.1transistor (1T) ferroelectric memory cells have been proposed andexperimentally studied in order to reduce the size of1T-1C (1Transistor-1Capacitor)design with consequent advantages in terms of size, read-out operation and costs.More recently ferroelectrics have been proposed as dielectric materials in order tolower the60mV/dec limit of the subthreshold swing (SS) in silicon Metal OxideSemiconductor Field Effect Transistors, MOSFETs.The objective of this thesis is to study the ferroelectric transistor performance forboth memory and switch application. For this purpose different Ferroelectric FieldEffect Transistors, Fe-FETs, structures have been designed and simulated.Firstly, the MFIS-FeFET (Metal-Ferroelectric-Insulator-SemiconductorFerroelectric Field Effect Transistor) device structure was modeled. And the memorywindow characteristics were simulated by changing the parameters of gate voltageand material. Simulation results showed that the memory window was became largerwith increases of the gate applied voltage, dielectric constant of insulation materialand the thickness of ferroelectric thin film. The electrical properties of MFIS-FeFETunder different temperature were also studied, the results show that with the increaseof temperature, the Ion/Ioffcurrent ratio was smaller and the SS became larger.Then, the tunneling field effect transistor (TFET) device structure was modeled.，and the transfer and output characteristics were simulated by changing the materialparameters. The simulation results showed that the SS of the TFET became smallerwith the increases of source doping, the dielectric constant of insulation materials.However, as the increases of body silicon insulation layer, the SS of the TFET becamelarger. The change trend of the Ion/Ioffcurrent ratio was opposite to the SS.Finally, a new type of low power consumption device, called FerroelectricTunneling Field Effect Transistor, was proposed and simulated. It was found that theferroelectric tunneling field effect transistor has lower SS and leakage current, by contrast with FeFET. By taking the advantage of negative capacitance effect of theferroelectric thin film, ferroelectric tunneling field effect transistor also can improvethe device on-state current, as a result improve tunneling devices low on-state current.