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The Hardware Development On Imaging Tracker And Interface Of The Capability Evaluation System

Posted on:2007-12-23Degree:MasterType:Thesis
Country:ChinaCandidate:J ChengFull Text:PDF
GTID:2178360242961798Subject:Pattern Recognition and Intelligent Systems
Abstract/Summary:PDF Full Text Request
To evaluate the infrared imaging track algorithm, a system for infrared imaging tracker and related interface circuit for the tracker capability evaluation system is introduced.The infrared imaging tracker implements the hardware architecture based on DSP and FPGA. FPGA is used to implement the low-level image processing algorithm which is very time-consuming but repeated a lot, while DSP (digital signal processor) is used to implement the high-level, complex algorithm such as single frame detecting, image segmentation, and target marking. Several kind of logic design method such as ping-pong operation and pip-line operation is introduced. And the image pretreating algorithm such as GAUSS filter, morphologic filter, statistics of histogram based on FPGA is also discussed, and they have been implemented and verified successfully.Universal Serial Bus is adopted in the interface circuit for imaging tracker capability evaluation system. It has the ability of transferring data up to speed of 480Mbps in theory, supports hot plug, installed conveniently, and is not limited by the number of PC interface. A chip of FPGA is used for the logic core controlling. The system can real time transfer the image data to the infrared imaging tracker and supports result data transferred back. Finally, Whole of the design and debugging job is finished, and the improvement suggestion is also proposed.
Keywords/Search Tags:USB, DSP, FPGA, Pipe-line, Morphologic filter, Object detecting
PDF Full Text Request
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