2.4GHz CMOS Zero-IF Receiver

This thesis presents a 2.4GHz RF front-end receiver. It designed to be used in a Zero-IF architecture. The Zero-IF receiver includes differential-end low noise amplifiers(LNA) and doubled-balanced mixers,which LO input is come from VCO. The LNA has 17.7 dB gain, 1.8dB IIP3, -11.6 dB P_1dB, 2.7dB NF and 18mW power consumption. The mixer shows 11.7 dB IIP3, 10 dB conversion gain, 12mW power consumption. The schematics of the front-end are all simulated by EDA tools Cadence's SpectreRF with TSMC0.18RF CMOS technology.