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Research Management & Control Technqiues Of Multi-Port Concurrent Testing

Posted on:2008-08-29Degree:MasterType:Thesis
Country:ChinaCandidate:Y Y FanFull Text:PDF
GTID:2178360215459221Subject:Computer application technology
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The technical background of this dissertation is multi-port router testing. The framework defined in ISO 9646 is largely restricted by its conformance testing orientation and single thread test configuration. For multi-port routers or switches, the LTM (Loop-back Test Method) and TTM (Transverse Test Method) recommended by ISO 9646, lacks coordination among parallel test threads hence unsuitable for performance testing. This has spurred the research activities at Sichuan Network Communication Key Laboratory (SC-Netcom Lab), on MPC-TTM (Multi-Port router Concurrent Transverse Test Method), MP-CTDL (Multi-Port Concurrent Test Definition Language) and MPC-TS (Multi-Port Concurrent Test System). These research and development activities are also the general background for author's MSc dissertation.The MPC-TS under development at SC-Netcom Lab is a two-level system: A Multi-Port Concurrent Tester Controller (MPC-TC) at the top interconnected via a switch to multiple Two-Port Testers (TPTs) at the bottom. Under control and coordination of MPC-TC, a TPT performs direct control and observation to the behavior of a single or a pair of ports. The MPC-TC, on the one hand, provides an interface to test operator and, on the other hand, plays core control and management functions for concurrent testing. It is therefore very important for MPC-TS development to study techniques relevant to MPC-TC and develop a prototype MPC-TC.This dissertation provides a comprehensive study of the requirements of MPC-TC in two-level MPC-TS and presents a prototype MPC-TC with detailed discussion. The MPC-TC itself is a complex functional component. MPC-TC has to convert the MP-CTDL specified test case into a concurrent test control program by use of MP-CTDL compiler beforehand, to perform concurrency adaptation modification and parameterization to TPT test cases in TTCN-3, and to select concurrent test case and designate relevant test cases for TPTs. During single test case execution, it coordinates multiple TPTs, monitors the test process and provides graphic display, logs test traffic and produces test reports, and preferably to provide a post-analysis tool.The main contribution of this thesis is that it provides a prototype MPC-TC for system debugging and integration for MPC-TS in a coordinated manner in a distributed environment.
Keywords/Search Tags:MPC-TS (Multi-Port Concurrent Test System), MPC-TC (Multi-Port Concurrent Test Controller), TPT (Two Port Tester), Interface between upper and lower tester, Test management, UIM (User Interface Module)
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