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Research And Realization Of Technology Of Test-State Transition Oriented Executable Test-Case Generation

Posted on:2009-06-15Degree:MasterType:Thesis
Country:ChinaCandidate:Y X LiuFull Text:PDF
GTID:2178360245989615Subject:Computer application technology
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The background of the work presented in the MSc dissertation is Network Testing. Sichuan Network Communication Technology Key Laboratory (SC-Netcom Lab) has introduced a multi-port concurrent test method called MPC-TTM (Multi-Port Concurrent Transverse Test Method) both for single router evaluation and for network performance testing and monitoring. A Distributed Multi-port Concurrent Test System (DMC-TS) based on MPC-TTM is currently under development at SC-Netcom Lab. The DMC-TS is formed of two functional parts: multiple TPTs (Two-Port Testers), each of which tests and monitors a pair of ports of the router under test, and a Multi-Port Concurrent Test Manager (MP-CTM), which acts as the master tester to coordinate the test process of individual TPTs through network connections. This dissertation is dedicated to executable test case generation techniques from TTCN-3 specification in TPTs.SC-Netcom Lab has taken the compiling approach towards conversion of test cases in TTCN-3 to cater for modern high-speed router testing. Analysis has shown that network testing process is "test-state transition" oriented, in other words, each test step can essentially be represented as a test-state transition table. Consequently, this dissertation promotes a "test-state transition" oriented approach in dealing with individual test-steps in a test tree, each of which is mapped onto a miniature transition table, within which frequently used test actions can be retrieved from the "Action" base for particular protocol during compiling. This simplifies handling of the main part of a test case in a unified manner. Followed this thinking, the author has redesigned SC-Netcom Lab TTCN-3/C++ compiler and preliminary compiling and test experiment have shown promising.Apart from the framework of the new complier, programs for syntactic and semantic analysis, and "C++ "code generation, have all been redesigned. Together with interfaces of sample PDU-Encoder/decoder and with adapter of support layers, an operational prototype TTCN-3/C++ compiler (version 3) is fledged for further test experiments. The work presented in this dissertation has led to a promising direction in executable test cases generation from TTCN-3 although it is still in its preliminary stage. With further refinement and experiment, the author believes that it is a better alternative to existing approach.
Keywords/Search Tags:MPC-TTM (Multi-Port Concurrent Transverse Test Method ), DMC-TS (Distributed Multi-port Concurrent Test System), Compiler "Test-state transition", oriented, Executable Test Case
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