The Design And Implementation Of Asymmetric Multiprocessor Architecture In Packet Data Service Node (PDSN)

PDSN (Packet Data Service Node) is an important equipment in CDMA2000 packet data network. The main task of PDSN is to process mobile data access business and to carry out data transmit between radio access network and public packet data network. According to communication industry situation in China, the PDSN product has inmitable advantage in compatibility and transition gliding property in the procedure of transition from 2nd Generation to 3rd Generation.PDSN can provide wireless call access service and transmit upwards and downwards network packet between mobile node and remote host in public network.The performance of PDSN will effect the capacity of mobile users access-on to network provided by CDMA 2000 network directly. If it could not complete task in time, it will become bottle neck of CDMA 2000 network. At present, the PDSN product all use multiprocessor to increase working efficiency. The designer should consider about a problem that which system architecture is more suitable to PDSN and is able to maximize processor utility.The PDSN product of our system uses embedded ASMP (Asymmetric Multiprocessor) architecture. The design of the architecture is attaching many processors to system bus, using software design to realize simple auxiliary relationship between each processor. In condition that the PDSN has its own feature in task distribution and the the instruct pipeline mechanism of the processor, ASMP architecture can exert the multiprocessor performance and meet the users' requirement.The thesis making an union of task distribution of PDSN and processor's feature, analyzes the reasons of applying the ASMP architecture in PDSN, researches the methods used to realize ASMP in MIPS multi-core multithreading processor, payes attention to describe the support of software structure to hardware architecture and particial memory shared mechanism used for communication between primary processor and secondary processors.