Design Of CMOS Front-end Amplifying Circuit For Optical Receiver

Front-end amplifying circuits are the one of key parts in optical-fiber communication systems and the import of optical receivers. Previously, they are realized in Bipolar-Silicon, BiCMOS and GaAs HBT technics with a large expenditure of money. Now the CMOS technics can actualize high speed circuits with making progress in sub-micrometre and deep sub-micrometre. The Design of 622Mbit/s front-end amplifying circuit for Optical Receiver based on CSMC-HJ 0.6um CMOS technics is shown in this paper.The front-end circuit processes weak input pulse signal from Photon-Diode. It changes current into voltage , restrains many kinds of noise and input signal fluctuation , keeps output signal amplitude stable and drives data-processing circuit. Besides, the Preamplifier is realized in current mode transimpedance one. The main amplifier is realized in limiting one. The current mode amplifier can reduce influence of the parasitical capacitance for better transfer effect and low input resistance in cascade amplifier. It also depress equivalent input noise of amplifier for large feedback resistance in common source stage and keep gain stable for voltage parallel negative feedback. And, the limiting amplifier can keep limiting effect on each pulse as using nonlinear character in SCFL current one. It also cut down cross interfere, enhance gain and bandwidth, keep the dynamic input range for full differential cascade unit.The circuit simulation is carry out by SmartSpice. We come to a conclusion that the circuit can work properly in 622Mbit/s under 5 V single source and normal temperature when gain is with more 69dBΩ, bandwidth with more 1GHz, dynamic input range with more 40dB and dissipation power with less 260 mW.