The Research Of SoC Test Data Compression Method Based On Test Resource Partition

The development in Very Deep Sub-Micron technology promotes the advent of System-on-a-Chip (SoC), which brings Very Large Scale Integrated (VLSI) circuits into a new period of development. The design of SoC mainly adopts the technique of reusable Intellectual Property (IP) core, so it has incomparable advantages not only in developing period, but also in the system function and performance. However, with the increase in the number of integrated IP cores, test data volume and test application time also grow quickly. If this problem is solved by enlarging storage capacity and transmission band width in Automatic Test Equipment (ATE), test cost will rise remarkably. Therefore, compressing test data becomes an effective way to reducing test application time and test cost.The thesis first introduces some domestic and foreign classic test data compression methods based on test resource partition, analyzes their advantages and disadvantages, and summarizes applicable scope of each method. Then, on the basis of the previous methods, two new encoded schemes are presented as follows.(1) State's Reversal Run Length codes (SRRL). Its basic idea is that the lengths of runs of 0s and 1s in test data stream are encoded by the same method without limitation only to the runs of 0s as Golomb codes and FDR codes. Furthermore, SRRL directly encodes a precomputed test set and doesn't require an optimized difference sequence by reordering the test set to efficiently compress. Its decompression architecture only needs a Finite-State Machine (FSM) and doesn't require a Cyclical Scan Register (CSR).(2) Fore-Compatible Marked codes of Data Blocks (FCMDB). Its basic idea is that first test data stream is divided into data blocks whose lengths are equal. Then, the data blocks which are compatible with the reference data blocks are replaced by mark "1". The mark "1" in the proposed approach is dynamic, and except for the reference data blocks it can mark all other data blocks which are compatible with the reference data blocks, but the index in encoding based on dictionary is static, and each index indicates only a symbol block. Simultaneously, the mark in the proposed scheme only has one bit, so the test set can be efficiently compressed. Its decompression architecture requires only a FSM and a CSR whose length is the same as one of the data block. Compared to the length of the CSR required in Golomb and FDR codes, which is equal to the length of the test vector, hardware cost in proposed scheme is less than in Golomb and FDR codes. Furthermore, communication protocol in FCMDB is very simple.The experimental results show that the two schemes can efficiently compress test data and outperform Golomb codes and FDR codes.