The Research On G? Codes And Hardware Architectures For Their Encoders And Decoders

In most digital communication and storage systems,error correction codes(EC-C)or erasure correction codes have been widely used to increase the reliability.As common classes of Algebraic codes,Reed-Solomon(RS)codes and Bose-Chaudhuri-Hocquenghem(BCH)codes have been extensively studied in the literature.Moreover,they have been adopted in numerous industrial standards.Through concatenating short Algebraic codes,one can obtain new codes with better correction performance.In most cases,the decoding algorithms for such Algebraic related codes have lower complex-ity than the modem codes,such as low-density-parity-check(LDPC)and polar codes.The another important feature is that their decoding performance can be accurately analyzed in most cases.Generalized integrated interleaved(GII)codes are a class of concatenated codes based on RS or BCH subcodes and originally proposed for dis-tributed storage systems.They are also a class of locally recoverable(LRC)codes,which can correct errors or erasures using only a portion of codewords in some cases.GII codes have attracted many research interests since they can achieve a good tradeoff between complexity and performance.This paper first shows some features of GII codes through comparing to the con-ventional generalized concatenated(GC)codes.Moreover,a more generalized defi-nition on conversion matrix is proposed.It is shown that the conventional conversion matrix is just a special case and more matrices are allowed to be the conversion matrix as long as a special invertibility constraint is satisfied.A high-throughput decoder is designed for GII-RS codes.It is the first imple-mented GII decoder in the literature.To reduce the critical path of GII decoders,the reformulated inversionless Berlekamp-Massey(riBM)algorithm is adopted and the conventional GII decoding algorithm is also reformulated.Such reformulated decod-ing algorithm can tackle the throughput bottleneck of GII decoders.A subtle method is proposed to handle the performance degradation caused by the miscorrections.Syn-thesis results show that more than 100-Gbps throughput can be achieved.This paper simplifies the encoding algorithm of GII-BCH codes by modifying the conversion matrix.Furthermore,a corresponding hardware encoder architecture is proposed.It is shown that the simplified encoding algorithm leads to lower hardware complexity and lower latency without any performance sacrifice.The original GII codes can be regarded as two-layer codes.In the literature,three-layer GII codes have been proposed.It is intuitive that GII codes with more layers have lower locality.However,it is not easy to construct GII codes with more layers since the corresponding invertibility constraints are difficult to satisfy.This paper tackles such problem and proposes a method to construct multi-layer GII codes.Simulation results show that multi-layer GII codes have lower locality.