DVS Based Energy-saving Compiler Technology

With the fast development of semiconductor and the fast growth of capacity of chips, more and more new technique is available on the embedded systems, especially the mobile embedded systems. The result of fast development of the application on the embedded system is that the battery of become the limitation of the system. The life and capacity of the battery is now a big problem for the reason that these applications consume more and more energy. As the development of Chemistry is on the bottle neck, to reduce the energy consumption by software and hardware become the main issue of design of embedded system.Lots of research on reducing energy in the embedded systems has been done. Most of these research focuses on scheduling of tasks in the OS level. Due to the limitation of OS, the schedule is not accurate for the reason that the basis of the schedule is the trace of the tasks in the OS, without inner information from the instructions of the tasks. To schedule the tasks more accurately than OS level, there is some research on the compiler and DVS.In this paper we present a compiler framework to reduce the energy consumption on embedded systems. Firstly the Dynamic Voltage Scaling (DVS) technology was applied on the static compiler and then it was integrated in the dynamic compiler. The Framework of Runtime Dynamic Compiler based DVS (RDCD) contains 3 steps, firstly it selects the candidate block which may suitable for DVS and then the runtime judging algorithm select the suitable blocks, finally the RDCD insert the DVS instruction at the beginning and end of these blocks.The framework is realized in a simulator and a real-system. Simulation results on the simple scalar with a new energy testing module show that CPU energy can save to 13%-15% for the Intel Xscale PXA270 benchmark with a time performance penalty of at most 5%. And the result from the real system shows that the dynamic compiler with DVS can save at most 23%.