Design And Application Of HV LDMOS FET

The development of display techniques and global communication market put an even higher requirement on the performance of high voltage integrated circuits (HVICs). As a relatively lower cost, higher performance device, LDMOS is becoming popular. This paper gives a complete research on the design and fabrication of LDMOS, as well as exploring some applications in the HV OPA and display driver ICs.Using TCAD techniques, we designed both N- and P-channel LDMOSFET, whose breakdown voltages (BVR) are over 300V and fabrication processes are compatible with the 1-μm pilot line in the IMETU.Then, we explored LDMOS's applications in high voltage, small signal ICs. We implemented a two-stage HV OPA with output stage, and finished its layout and isolation structure. Simulation results show the OPA is high voltage, high gain, and can be used in the driver circuits for digital communication.We also explored LDMOS's application in high-and-low voltage mixed ICs.In OLED display driver IC, we designed a thin gate oxide, low power consumption and self-returning Voltage Level Shifter circuit. To do it, we used these 0.35μm HV LD-NMOS and LD-PMOS to form the complementary output stage, which worked as the power driver of OLED.In EL driver ASIC, we designed a DC/AC converter. The key part is the design and fabrication of HV LIGBT devices. By comparing LIGBT with these LDMOS we designed previously, we found they were very similar except changing the N+ implant under the Drain to P+ under the Anode. Through simulations, we got the structures and parameters for HV LIGBT at last, and simulation results showed them could satisfy the requirements of BVR>200V, ION>150mA.In this paper, we integrated the HV MOSFET in low voltage standard CMOS technology. Since 0.5μm standard dual-well CMOS technology is very mature and well applied in industrial products, our research can reduce the technology...