Research And Design Of AM-OLED Display Driver Chip

OLED has been considered as the most likely alternative technology to LCD because it has many advantages such as solid state, self-luminous, high brightness, high contrast, ultra-thin, low-cost, low power consumption, wide viewing angle limits, large operating temperature range and so on. However, compared to the rapid development of OLED display technology, the development of OLED driver chip is extremely delayed, which severely restricts the further development of OLED display. This article designs a 20 sub-fields approach to display 256-level grayscale on 3.5 inch AM-OLED screen by analyzing the characteristics of OLED display's control system, OLED driving method and grayscale scanning methods. This approach reduces the weight of the master sub-field and rearranges the order of all the sub-fields, which significantly improved the clarity and brightness of OLED display.The chip has a synchronization module, a preprocessing module, a Frame Buffer module, a scan output module and an IIC module. In the design, a First-In-First-Out memory is used in this chip to help it synchrony the QVGA data, which makes the driver chip obtain a greater compatibility because its requirements for external data source are greatly reduced. The preprocessing module helps the chip achieve such functions as no-rotation, clockwise rotation and counterclockwise rotation, which greatly increasing the driver chip's practical value, especially in the mobile display industry.This design uses Verilog HDL to complete the RTL code, use Verilog Compiled Simulator to do the RTL code's simulation and use Design Compiler to turn the HDL description to gate-level netlist. After that, a FPGA verification platform is set up to complete the functional verification. The layout is also generated after the back-up design of the whole chip in Linux environment.