The Design And Implementation Of Computer Composing Experiment VHDL Platform Based On FPGA

《computer composing principle》 is a core course in the computer science department. But due to the involved knowledges is very large and wide, including CPU, instruction system, storing system, bus and input output system etc facet, when students were studying this course, they would rifely feel difficult to understand the content. Recur to this experimental system of computer composing principle, student could digest more knowledge through the experiment tache, predominate working principle of every system module and relationship with each other.In order to enhance and improve the power and flexibility of experimental syetem, reduce the cost at the same time, we adopt FPGA chip technology to update existing experiment system. This technology could be customized base on the request and load the different hardware logic which is writen by the VHDL language, FPGA is programable, make the function of hardware changeable, this new soft-hardware design concept bring the flexibility and adaptability to experimental syetem. It makes not only the improving and expansion of ability of system more easy and convenient but also different experiment designed by students themself become possible. The final aim of computer composing principle experiment is teaching students how to design a CPU, but at first, students must know how the each function module of CPU works, and how they cooperate with each other. So, we must design and build a teaching hardware platform base on FPGA chip, then develop the VHDL library and main logic function form that platform, at last, we should design the whole experiment content.This article has investigated concentratively the VHDL hardware system base on FPGA, due to the high standardization and hardware describing ability of VHDL, the main function of modern CPU such as compute, store and I/O operation could implemented by VHDL. At the same time, the content of experiment including composing of sequential logic circuit, controlling principle experiment, composing 8 bit computing unit and composite computing experiment, storing experiment, data bus experiment, float computing unit experiment, multi-pipelining processor experiment etc, all of these experiment engender a correlative system. Teacher explain principle and theory of every experiment, students implement the circuit input by MAX+PLUSII tool, so the student experiment actually is VHDL programming, and needn't much complexity, as loog as they call the interface, then burn the programme into the platform, neither spent too muchtime on the circuit drawing, nor make students feel so hard to understand working principle and process of every component.At first, this article investigate and analyses the FPGA hardware experiment platform------thehardware system. The system base on the FPGA-XC4010EPC84, 62256CPLD and other chips, according to the different demand, design the different experiment controlling logic. Customers could select each logic and download it to the FPGA chip composing own experiment platform.Secondly, this article expound the modularized design of VHDL detailedly, and how to use VHDL technology to implement every function part of CPU. As a international standardized hardware describe language, since VHDL language get IEEE authorization, it came through two modification in 1993 and 2001, adopted by a lot of world famous Electronic Design Automation (EDA) tools developer up to the present, and widely entered the digital system design and research domain with EDA design tools, by now, VHDL already became a hardware design technology which was universally accepted by electronic industries.Then, this article has brought the in-depth expatiation and anatomy when contraposing the intractable problem occurred in multi-pipelining. What condition and content of experiment is needed by students, so that the students could understand the core technology adopted by CPU, predominate the design of CPU, and principle of running. Otherwise, the context of this article needed students be familiar with basic VHDL knowleages and skills, because the experiment is base on the VHDL programming.Basically, this article implements a FPGA experiment platform project integrally in the lab circumstance. On this condition, tested and analyzed part of function and performance. Our research provides a way and referenced scheme for the application of FPGA in real system. The harvest of our research has an important academic and realistic significance for the further development of FPGA and VHDL standard.