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FPGA Implementation Of Arithmetic Coding In JPEG2000

Posted on:2008-01-10Degree:MasterType:Thesis
Country:ChinaCandidate:W FanFull Text:PDF
GTID:2178360212479653Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
JPEG2000 is the next generation still image compression standard introduced by Joint Photographic Experts Group in December, 2000. Different from JPEG, Context Based Adaptive Arithmetic coding is used in the last part of the encoding process as the entropy coding. It has better compression performance than JPEG Basic theory of arithmetic coding is studied, The implement of arithmetic coding is implemented by program C, the circuit is designed and is verified in FPGA.First, Basic theory of arithmetic coding is studied. The critical technology is analyzed including adaptive estimate of probability, the implement of finite precision and the operation without multiplication. The chart of arithmetic is improved with software.Second, the arithmetic coding is implemented by program C including code program and decodes program.the results shows function of arithmetic coding is correct.Third, the circuit design of arithmetic coder is completed .The arithmetic coder is described with Verilog HDL, and simulated to verify the functional correction with Modelsim6.0. Then it is synthesized in Quartus5.0 and downloaded to the FPGA. Experimental result shows that the encoder can work up to 63.37MHz on Altera's EP2C35F672C8 and consumed 672 LE (logic element). The result shows funcation simulation is same as timing simulation.Finally, In order to verify the arithmetic coding in FPGA, The acquisition system based on parallel port camera is completed. The compressed coding streams are transferred to computer by the acquisition system and are decoded by software. Its can be used as an IP core for JPEG2000 image compression.
Keywords/Search Tags:JPEG2000, DWT, Arithmetic coding, FPGA
PDF Full Text Request
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