The Testing Platform Of Cryptographic Algorithm

The cryptology technology is at the core of it information security. Under the development of Electronic Technology and network attack technology, The need of high-intensity algorithm which could be came true easily is quickly in the face of engineering and technical personnel. Thus, high-intensity algorithm which could be realized easily is urgently needed in engineering and technical personnel, and a platform to test the algorithm's correctness of its operations, speed, safety and feasibility is also very important. This hardware platform must reflect the current digital technology.The study was launched in the research center of Beijing Electronic Science and Technology Institute. This paper mainly investigates hardware design. In connect with the actual situation of the study of algorithm, this paper propose a scheme of the testing platform of cryptographic algorithm, and designed the hardware test platform based on the SCM, DSP and FPGA.The paper includes the following aspects: First, a detailed analysis of mainstream processors and ASIC technology. Second, the structure of the hardware test platform is determined through functional analysis of the testing platform of cryptographic algorithm. Third, expatiated the processes of the scheme of the Main Board and algorithm modules'schematic. Finally, compiled interface functions of each module and processor by the software debugging, complete the integrated scheduling of the system, and finally accomplished the study.