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Multi-Spectral Image Compress Arithmetic Design And The Implement With FPGA

Posted on:2007-01-13Degree:MasterType:Thesis
Country:ChinaCandidate:J W ZhuFull Text:PDF
GTID:2178360185985542Subject:Computer Science and Technology
Abstract/Summary:PDF Full Text Request
With the development of our spaceflight and progress of deep space exploring, the conflict in the deep space detector between large numbers of data to be transmit and limited channel capability is more and more serious. To transmit as more data as possible with the limited channel capability, every country which keep ahead in the field of deep space exploring pay more and more attention to the research of compression of space data. For the sake of large numbers of information, the compression of multi-spectral images is the most important content in the research. The main content of this paper is compress arithmetic of multi-spectral image, and the implement with FPGA.In the phase of preprocess, the paper analyses the characteristics of multi-spectral image, classifies data redundancy to two classes: spatial-redundancy and spectral-redundancy, afterwards, eliminates these data redundancy with different forecast models. To eliminates spatial-redundancy, improved the forecast model of JPEG-LS(Lossless and near-lossless compression Standard of JPEG) which based on context is used. And the paper designs a spectral-forecast model to eliminate spectral–redundancy. Using these two forecast models together, spatial-redundancy and spectral-redundancy are eliminated.In the phase of coding, a"parallel fixed code"is designed. This code defines nine fixed coding mode. Using the look-up tables, there is no complex calculation in the progress of coding. After many tests, this code is proved high-efficient and fast.In the phase of data treats, the paper introduces a data pipeline technique into the arithmetic. The speedup ratio is 8.89, largely increases the speed of compression.The arithmetic designed in this paper uses few memories in the compression of multi-spectral image. In applications, we do not have to place memorizers on the compress card, but only 24 BlockRAMs are needed in the FPGA(Field Programmable Gate Array), so we can reduce the weight,volume and energy consumption of the space equipment.At last, software and hardware are designed to implement the arithmetic...
Keywords/Search Tags:multi-spectral, data redundancy, entropy coding, data pipelining, FPGA
PDF Full Text Request
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