Design And Implementation Of RS Codec Using FPGA

Reed-Solomon code, a powerful error correcting code for burst and random errors, is widely applied to deep space communications, mobile communications, disk array, digital video broadcasting system (DVB), and so on.In this paper, the common used encoding algorithms and basic finite-field opera-tions algorithms are introduced, and the decoding algorithms such as inverse-free Ber-lekamp-Massey (iBM) algorithm, reformulated inverse-free Berlekamp-Massey (riBM) algorithm and modified Euclidean algorithm are analyzed in great detail. Based on the riBM algorithm, a modified structure and a pipelined decoder scheme are presented. A tradeoff has been made between the hardware complexities and decoding latency, thus this scheme gains significant improvement in hardware complexity and maximum fre-quency. This modified design scheme has been validated by a RS (255,239) decoder implemented in Virtex-II series of FPGA from Xilinx Company.