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Research On Digital Receiver Synchronization Algorithms For Wireless Communications

Posted on:2007-01-26Degree:DoctorType:Dissertation
Country:ChinaCandidate:T X YaoFull Text:PDF
GTID:1118360182990560Subject:Communication and Information System
Abstract/Summary:PDF Full Text Request
In this paper, we study the synchronization algorithms in digital receiver for wireless communications. The synchronization part of the receiver usually includes symbol timing, carrier frequency offset estimation and phase tracking .etc. It is very important since it lays in the front-end of the digital receiver, thus it is fundamental to correct channel estimation and decoding.The main difficulties and tasks in the synchronization algorithm design are quite different in different systems (different modulation schemes and channel conditions). We studied three typical cases: Pulse-Amplitude-Modulation under AWGN channel, CDMA spreading modulation under fading channel and OFDM modulation under fading channel. Based on three representative wireless communication standards, namely, DVB-S2, WCDMA and DVB-T, which adopt the above three modulation schemes respectively, we analyze the main tasks in the synchronization design, investigate the short-comings of existing algorithms and then propose several new synchronization algorithms.We propose a new DVB-S2 receiver structure, which adopts the balanced quadric-correlator as the coarse frequency correction stage. Experiments show the proposed structure has much smaller convergence time than the approach proposed by the ETSI standard. The proposed algorithm also has low computational complexity. In the fine frequency correction stage, we propose Modified-Kay algorithm based on the frame structure of DVS-S2. The estimation precision has been greatly improved with a relatively small amount of computational complexity increase.For CDMA delay locked loop working under multi-path channels, one challenge is how to guarantee the loop to work correctly when the multi-paths are closely-spaced (with spacing being 1-2 chips). We analyze why the traditional DLL will fail under such circumstances. Then we propose a new adaptive coherent CDMA delay locked loop. The proposed adaptive DLL also has quite low computational complexity. Experiments show the efficiency of our algorithm.For OFDM system, we first thoroughly analyze performance degradation caused by the synchronization inaccuracies. Then we propose new algorithms for estimating the synchronization parameters. Based on the pilot structure of DVB-T, we propose a joint carrier frequency and sampling clock frequency offset estimation algorithm whose complexity is quite low. For severely frequency-selective channels, the traditional RMS joint carrier frequency and sampling clock frequency offset estimation algorithm will suffer from low SNR in the deep fading sub-carries. We propose a RANSAC based algorithm to iteratively estimate carrier frequency and sampling clock frequency offset. Experiments show the proposed approach has better performance for such severely frequency selective channels.
Keywords/Search Tags:full-digital receiver, synchronization, phase locked loop, DVB-S2, convergence time, fading channel, CDMA coherent tracking loop, closely-spaced multipath, OFDM, joint carrier frequency and sampling clock frequency offset estimation, RANSAC
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