Research Of The Virtual Radio And Implementation Of The Demodulation For 16QAM Signal

This thesis designs and realizes a virtual radio receiver, based on studying the basic theory and realization technology of digital receiver, virtual radio, and signal processing, as while the system of the demodulation of 16QAM is simulated based on this receiver discussed above. In my systematic design, that present advanced devices are used to construct the hardware platform of the virtual radio receiver. And it goes into the designing process of different modules of the hardware platform such as PCI interface, A/D module, FIFO, and CPLD in details. Under the circumstance of Windows2000, driver program and user application program are developed. The digital signals are transferred by the digital acquisition system and PCI bus in the receiver which can implement high-speed data channel in current computer using DMA mode and double side address map. The arithmetic of demodulating the 16QAM signal is studied and analyzed from the aspect of timing error estimating, carrier frequency excursion estimating, and carrier phase excursion estimating while the arithmetic adopted in my system is compared with the classic arithmetic. In conclusion, the demodulation of 16QAM signal is realized and the performance is simulated successfully based on the design discussed in the thesis.