A Low-If FM Radio Receiver Design With Improved Station Seeking Solution

FM radio systems are widely used in radio broadcasting, TV and wireless communications. Recent years CMOS IC technology developing fast, but FM radio receiver design has little improvement because most manufacturers still use bipolar or Bi-CMOS technology to design the receiver that cause it can not take advantage from the CMOS technology development. This situation didn’t end until a CMOS based digital low-IF receiver architecture appear in the market. Because of its high integration and great performance, many attention are focused on this architecture.How to find the station accurately is a big problem in commercial FM receiver design. Currently designer use RSSI to detect station. These station seeking architectures always have a analog circuit which occupy plenty space to detect the current of amplitude limiter. And further more it’s easy to make mistakes. Generally FM bandwidth can be expanded up to 180Khz, and it’s found that RSSI is bigger than the seeking threshold in the bandwidth sometimes. So that these will cause mistakes in 50KHz or 100KHz step seeking.The project stated in this thesis is a part of a low cost FM Radio receiver design based on digital low-IF receiver architecture. In the design, an improved design solution for FM radio station seeking is proposed here to conquer misinformation. The solution uses both RSSI and frequency deviation to judge the station carrier frequency. chip test result shows that it has improved the accuracy of station seeking.