If Digital Receiver Msk Signal Modulation And Demodulation And Frequency Technology For Estimating

The upgrade of system can be completed easily and cost little by software radio system, for it can shake off the shackles of the hardware platform and change the behavior of the physical layer directly through the software, and different systems can be interconnected, which has important significance and prospect. There is no research on synchronous digital demodulation of a multi-channel multi-rate multi-mode digital IF receiver , so a program of such a digital IF receiver based on software radio is proposed in this paper, which makes a deep research on the sampling theorem, channel extraction, multi-rate signal processing, synchronous demodulation and so on. The MSK signal modulation and demodulation theory is deeply analyzed and studied, DDC is used to perform channel separation, then CIC filter, HB filter and FIR filter are cascaded to make decimation, at the same time a difference demodulation method avoiding carrier synchronization is used, and digital PLL technology is adopted to realize synchronization, at last, MSK signal modulation and demodulation are realized in FPGA.The algorithm for frequency estimation with sub-Nyquist sampling is studied in this paper, an improved algorithm for frequency estimation with sub-Nyquist sampling is proposed, which uses two ADCs with different sampling rates for two-channel sampling, then FFT calculations for the two channels are performed separately, and frequency is estimated accurately through the algorithm of spectrum refinement, eventually the unambiguous frequency is estimated through a pairing method. The algorithm is not sensitive to inconsistency, although the estimation precision is limited by the points of FFT, higher estimation accuracy can be realized through the algorithm of spectrum refinement. This algorithm is implemented by the hardware easily more, FFT IP core can be used in FPGA, spectrum refinement needs arc-tangent operation, which can be completed by the CORDIC IP core of FPGA, the calculation of pairing method is also simple, so this algorithm has good applications.