Design And Realization Of The FFT Processor

This paper brings forward a design and realization for the FFT processor.The design includes system architecture design arithmetic realization FPGA realization verification and testbench etc.The design has made a good base for the future development of the FFT processor.The processor can be used in real time processing etc.The first chapter is the summarization which looks back the development history of the FFT arithmetic and it's application in each domanial. The second chapter brings forward two kinds FFT arithmetic and four hardware architectures.This chapter make choice on realization.The third chapter dicusses the design of FFT controller's compute unit.Here we talks about how to design adder and multiplier.We use the advance carry chain to design the adder and use the array arcitechure to design multiplier.The fourth chapter mainly discuss FFT processor's architecture and realization.Here,we introduce the realization of controller and discuss the state transfer in the controller .We also discuss the realization of the adderss generator unit. The fifth chapter makes emulation and makes exepectation of the FFT controller.