Design And Implementation Of Interface On Multi-Channel Parallel Shortwave-Signal Receiving Platform

The thesis is devoted to the design and implementation of interface on multi-channel parallel shortwave-signal receiving platform, which uses FPGA to realize real-time control so the platform can work normally and complete the data collection and the communications between the computer and the part of DSP.The work in this paper is an important part of a military project.The main work and achievements are summarized as follows:1,The interface circuit betweenthe PCI chip PLX9054 and FPGA is designed and realized.The standards of the PCI bus is briefly studied.Based on which,the part-bus interface module is implemented and its implementaion in the platform is introduced.According to the time sequence in the booklet,the"Flag Method"is proposed as an implementation method of the FPGA.2,The implementation of FPGA which controlls the time sequence.3,The interface circuit betweenthe PCI chip DSP6711 and FPGA is designed and realized.Firstly,the state-converting graph is introduced according to the programme and the simulation result is given, while the efficient method in which the state-limited machine can realize complicated time control is summarized.Secondly,after the initialization of the McBSP register in the DSP programme,the previous aim is achieved with the use of serial-to-parralell converting module and frequency diversion module.Based on which,the upload of the data is completed.Thirdly,the overall adjustment of the system is complemented and the result fits for the pre-design.4,The implementation of interface circuit between the collection chip and FPGA.The characteristic of the collection chip AD7654 and the function of the important pins are introduced first.Secondly,the working time sequence of the chip is presented and the time control module is analized and implemented.